Numerical full well capacity extension for photo sensors with an integration capacitor in the readout circuit using two and four phase charge subtraction
US7436342B2 · kind B2 · utility
2Cited by
23References
16Claims
0Family size
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Inventor
Key dates
| Filing date | Jan 30, 2007 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Jan 30, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/77
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A detector circuit having an integration capacitor coupled to an amplifier via a switch matrix and a comparator coupled to the amplifier, the integration capacitor operable in two or more phases, the switch matrix is configured to phase switch the integration capacitor, the comparator triggers the phase switch when the output voltage of the amplifier passes the threshold voltage of the comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.