Integrated circuit with a data memory protected against UV erasure
US7436702B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2006 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Apr 7, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method protects against a global data erasure an integrated circuit comprising an electrically programmable data memory and a control unit to execute commands for reading or writing in the memory. The method includes the steps of providing, in the integrated circuit, electrically programmable reference memory cells, at putting the integrated circuit into service, storing, in the reference memory cells, bits of determined value forming an authorized combination of bits and, during the operation of the integrated circuit following its putting into service, reading and evaluating the reference memory cells and blocking the integrated circuit if the reference memory cells contain a forbidden combination of bits different from the authorized combination.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.