Fast random access DRAM management method including a method of comparing the address and suspending and storing requests
US7436728B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2006 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Nov 8, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to manage fast random access of a DRAM memory is described. The method includes steps of: dividing the memory into memory banks accessible independently in read and write mode; identifying the address of the bank concerned by a current request and comparing the address of the bank concerned by a current request with the addresses of the N−1 banks previously requested. N is an integral number of cycles necessary for executing a request. If the address of the bank concerned by a current request is equal to the address of a bank corresponding to one of the N−1 previous requests, then the method further includes steps of suspending and memorizing the current request until the previous request involving the same bank is executed, otherwise the current request is executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.