Multiplier-accumulator block mode splitting
US7437401B2 · kind B2 · utility
10Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2004 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Jan 19, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17732
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device is provided that includes a MAC block having mode splitting capabilities. Different modes of operation may be implemented simultaneously whereby the multipliers and other DSP circuitry of the MAC block may be allocated among the different modes of operation. For example, one multiplier may be used to implement a multiply mode while another two multipliers may be used to implement a sum of two multipliers mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.