Dynamic voltage scaling system
US7437580B2 · kind B2 · utility
13Cited by
14References
42Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 5, 2004 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Apr 9, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for implementing a Dynamic Voltage Scaling (DVS) system are presented herein. In one embodiment, an embedded delay checker (EDC) cell is used to measure the actual activity and delay of a critical path within a microprocessor core, which is the basis for dynamically altering the voltage to the core. In another embodiment, a slaved ring oscillator (SRO) cell is placed adjacent to the microprocessor core and is used along with EDC cells to provide redundancy to a DVS system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.