Pixel structure and fabricating method thereof
US7439541B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2007 |
| Grant date | Oct 21, 2008 |
| Priority date | — |
| Expiry date | May 16, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A pixel structure including a substrate, a gate, a patterned dielectric layer, a semiconductor layer, a source, a drain and a reflective pixel electrode is provided. The gate is disposed on the substrate, whereon the patterned dielectric layer is disposed to cover the gate. The patterned dielectric layer has a plurality of bumps and at least one opening; the bumps are disposed on the substrate exposed by the opening and the semiconductor layer is disposed on the patterned dielectric layer above the gate. The source and the drain are disposed on the semiconductor layer. The reflective pixel electrode is disposed on the patterned dielectric layer to cover the bumps and electrically connected with the drain. Hence, the pixel structure can achieve better reliability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.