Generic ink jet head fire logic
US7441850B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2005 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Dec 6, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06K15/102
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An inkjet firing architecture for use in association with a device utilizing an ink jet head. The inkjet firing architecture includes a fire synchronization block including an N-entry delay line, at least one vector sequencing block, and a vector compositing block. The N-entry delay line is operable to simultaneously delay multiple incoming external events for varying periods of time prior to passing each of the events to one of M event sub-dividing stages and provide a fire synchronization block output that is related at least in part to the delayed incoming external events. Each of the M event sub-dividing stages emits a programmable series of sub-events, each of the sub-events being separated in time by a sub-event interval. Each programmable series of sub-events ends with an independent Mth level sub-event that is passed along as the fire synchronization block output to the at least one vector sequencing block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.