Processes for forming backplanes for electro-optic displays
US7442587B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2006 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Mar 2, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/13613
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the inve…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.