Methods of manufacturing fin type field effect transistors
US7442596B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2006 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Oct 16, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
Abstract
A fin type field effect transistor includes a semiconductor substrate, an active fin, a first hard mask layer pattern, a gate insulation layer pattern, a first conductive layer pattern, and source/drain regions. The active fin includes a semiconductor material and is formed on the substrate and extends in a direction away from a major surface of the substrate. The first hard mask layer pattern is formed on a distal surface of the active fin from the substrate. The gate insulation layer is formed on a sidewall portion of the active fin. The first conductive layer pattern includes a metal silicide and is formed on surfaces of the substrate and the gate insulation layer pattern, and on a sidewall of the first hard mask pattern. The source/drain regions are formed in the active fin on opposite sides of the first conductive layer pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.