Differential amplifier, data driver and display device
US7443239B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 2007 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Apr 22, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45726
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential amplifying circuit that includes a differential pair and a cascode current mirror circuit that forms the load circuit of this differential pair. The cascode current mirror circuit includes a control-terminal-coupled first transistor pair, and second and third transistor pairs that receive first and second bias signals at coupled control terminals, respectively. The second transistor pair is straight-connected between the first transistor pair and the input end and the output end of the cascode current mirror circuit, and the third transistor pair is cross-connected between the first transistor pair and the input end and the output end of the cascode current mirror circuit. The second and third transistor pairs are controlled so as to each be placed in active and inactive states by changing over voltage values of the first and second bias signals, with control being exercised in such a manner that when one of these transistor pairs is in an active state, the other is in an inactive state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.