Superconducting circuit for high-speed lookup table
US7443719B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2006 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Oct 14, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S505/837
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.