Patent · US Active

Tracing through reset

US7444504B2 · kind B2 · utility

4Cited by
32References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 20, 2007
Grant dateOct 28, 2008
Priority date
Expiry dateJun 20, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/3656
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method of tracing a data processor upon reset of the data processor. A data processor reset signal resets the data processor, part of trace collection hardware and does not reset remaining parts of trace collection hardware. The data processor reset signal may be not owned, owned by an application program or owned by a debugger. The partial not reset of the trace collection hardware occurs only upon a data processor reset signal owned by the debugger. A trace logic reset signal resets both the data processor and the trace collection hardware when not owned. This trace logic reset signal resets the data processor only when owned by the debugger and resets the trace collection hardware when owned by an application program.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.