Balancing computational load across a plurality of processors
US7444632B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2003 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Mar 13, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5044
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Source code subtasks are compiled into byte code subtasks whereby the byte code subtasks are translated into processor-specific object code subtasks at runtime. The processor-type selection is based upon one of three approaches which are 1) a brute force approach, 2) higher-level approach, or 3) processor availability approach. Each object code subtask is loaded in a corresponding processor type for execution. In one embodiment, a compiler stores a pointer in a byte code file that references the location of a byte code subtask. In this embodiment, the byte code subtask is stored in a shared library and, at runtime, a runtime loader uses the pointer to identify the location of the byte code subtask in order to translate the byte code subtask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.