Methods for integrated circuit module packaging and integrated circuit module packages
US7445968B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2005 |
| Grant date | Nov 4, 2008 |
| Priority date | — |
| Expiry date | Aug 30, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In order to achieve electromagnetic and/or thermal isolation between components in close proximity to each other on a common module substrate, an alternate package and method for manufacturing the package is provided.Inventive methods utilize a grounded, metal-coated overmold for a IC module package that can provide an alternate thermal path to heat sink high power components generating excess heat energy and/or provide general electromagnetic shielding and isolation between two integrated circuits in very close proximity that are susceptible to electromagnetic interference.A dielectric layer conformably covers semiconductor dies mounted on a substrate. On some semiconductor dies, a portion of the dielectric layer is removed from the back surface of the semiconductor dies to allow direct contact between the exposed back surface of the dies and a metallization layer forming part of the overmold. This direct contact allows heat energy to be drawn away from the dies. The metallization layer also acts to shield the dies from disruptive electromagnetic energy radiated from other dies in close proximity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.