Receiver start-up compensation circuit
US7446568B2 · kind B2 · utility
0Cited by
5References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 29, 2006 |
| Grant date | Nov 4, 2008 |
| Priority date | — |
| Expiry date | Jul 20, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/262
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An integrated circuit includes a current mirror circuit for providing a current at an output end, a power-down switch coupled to the output end of the current mirror circuit for controlling access of the current generated by the current mirror circuit based on signals received at a control end of the power-down switch, and a compensating unit coupled to a bias end of the current mirror circuit and the power-down switch for stabilizing voltages at the bias end of the current mirror circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.