Comparator systems and methods
US7446573B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 24, 2006 |
| Grant date | Nov 4, 2008 |
| Priority date | — |
| Expiry date | Sep 25, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In accordance with an embodiment of the present invention, a comparator system includes a plurality of multiplexers adapted to multiplex a number of differential input signals and a number of differential reference signals. A differencing circuit receives a differential input signal and a differential reference signal from the multiplexers and provides a differential output signal, which is used to provide a differential comparator output signal. A latch may be provided to perform differential-to-single ended conversion on the differential comparator output signal to provide a latch output signal. An output circuit may provide a registered digital output signal based on the latch output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.