Incremental delta-sigma data converters with improved stability over wide input voltage ranges
US7446686B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2006 |
| Grant date | Nov 4, 2008 |
| Priority date | — |
| Expiry date | Sep 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/39
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of operating a delta-sigma data converter includes receiving an input signal at an input of a delta-sigma modulator having a loop filter including a plurality of integrator stages, a quantizer for generating a quantized output code from outputs of the integrator stages, and a feed-back loop coupling a feed-back signal from the output of the quantizer to the input of the delta-sigma modulator. The input signal is converted to quantized output codes during a conversion period including a plurality of integrator cycles in which at least one of the integrator stages is held in reset for at least one integration cycle at the start of the conversion period to maintain stability of the modulator over a wider range of levels of the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.