Fast data breakpoint emulation
US7447942B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2005 |
| Grant date | Nov 4, 2008 |
| Priority date | — |
| Expiry date | Dec 7, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/145
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique to implement software debugging capability using breakpoints includes creating breakpoints, storing them in a watchlist, and paging out a virtual address (VA) to physical address (PA) page entry in a translation look-aside buffer (TLB). When software under test is run at full speed, memory is accessed via the TLB VA to PA page translations. When a translation is missing, an exception is generated. Handling the exception includes determining if the page missing from the TLB matches a breakpoint address in the watchlist. The address and operation type are compared to the watchlist. If the operation matches the address and not the specified data, then the software under test is single stepped, the TLB page is removed and the software under test continues to execute. If the breakpoint and data type matches, then a debugger is notified and debugger action to service the breakpoint occurs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.