Memory system comprising a controller managing independent data transfer between input-output terminal, synchronous dynamic random access memory, and flash memory
US7450457B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 2007 |
| Grant date | Nov 11, 2008 |
| Priority date | — |
| Expiry date | Apr 16, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7206
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system contributes to improvement in efficiency of a data process accompanying a memory access. The memory system has a rewritable nonvolatile memory, a buffer memory, and a controller. The controller controls, in response to an access request from an external apparatus, first data transfer between the controller and the external apparatus, second data transfer between the controller and the nonvolatile memory, and third data transfer between the controller and the buffer memory, controls transfer from the controller to the buffer memory in the third data transfer and transfer from the buffer memory to the controller in a time sharing manner, and enables the first data transfer or the second data transfer to be performed in parallel with the transfer carried out in the time sharing manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.