Message writing apparatus, message writing method, message readout apparatus, message readout method, memory address control circuit for writing of variable-length message and memory address control circuit for readout of variable-length message
US7450594B2 · kind B2 · utility
0Cited by
11References
15Claims
0Family size
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Key dates
| Filing date | Nov 9, 2001 |
| Grant date | Nov 11, 2008 |
| Priority date | — |
| Expiry date | Apr 24, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5662
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In multi-connections, a message writing apparatus is provided. This message writing apparatus (21) comprises a path recognizing section (21a), a received message assembling section (21b), a receive control section (21c), an arbitrating section (21d) and an external memory control section (21e). When a received ATM cell is written/readout in/from a receiving buffer, it is written/read out in a memory area corresponding to each path, which enables the processing of AAL5 messages from a plurality of paths and improves the transfer processing capability, thereby leading to realizing a shortening of the data transfer time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.