Embedded microprocessor emulation method
US7451074B2 · kind B2 · utility
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Key dates
| Filing date | Mar 21, 2002 |
| Grant date | Nov 11, 2008 |
| Priority date | — |
| Expiry date | Jun 9, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/261
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of emulation or functional testing of a first microprocessor in its functional environment including one or several peripherals and at least one internal bus of communication between this first microprocessor and its peripherals, from a second microprocessor, consisting of deactivating the first microprocessor, using the communication bus(es) to communicate between the two microprocessors and the peripheral(s), and activating the second microprocessor, wherein the first microprocessor communicates with the second microprocessor over a series link and wherein the second microprocessor is realized by a simulation model.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.