Load-lock and semiconductor device manufacturing equipment comprising the same
US7452174B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 25, 2006 |
| Grant date | Nov 18, 2008 |
| Priority date | — |
| Expiry date | May 25, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67781
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A load-lock and semiconductor device manufacturing equipment have a wafer anti-contamination measure capable of maximizing production yield. The load-lock includes a chamber that can be hermetically sealed, a slit valve disposed at the front of the chamber for placing the chamber in communication with another chamber, a door disposed at the back of the chamber so as to allow a wafer cassette to be introduced into the chamber. In addition to having at least one of the load-locks, the semiconductor manufacturing equipment includes a transfer chamber to which the load-lock is connected, at least one process chamber connected to the transfer chamber, and an exhaust system by which each load-lock chamber is evacuated. The wafer anti-contamination measure may be an anti-eddy cover that covers the open back of a wafer cassette when the cassette is supported in the load-lock chamber. Alternatively, the wafer anti-contamination measure may be ductwork of the exhaust system that extends vertically along the door and/or rear wall of the load-lock chamber.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.