Thin film transistor panel
US7453086B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2006 |
| Grant date | Nov 18, 2008 |
| Priority date | — |
| Expiry date | May 14, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/1393
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A thin film transistor panel is provided. The thin film transistor panel includes: a substrate; gate lines formed on the substrate; data lines insulated from the gate lines and intersecting the gate lines; thin film transistors which are connected to the gate lines and the data lines and have drain electrodes; capacitive coupling electrodes connected to the drain electrodes; and pixel electrodes which are formed in the pixels surrounded by the gate lines and the data lines and include first pixel electrodes connected to the drain electrodes and second pixel electrodes which are separated from the first pixel electrodes and overlap with the capacitive coupling electrodes, wherein the first and second pixel electrodes of different pixel electrodes have a left-right symmetrical structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.