Method for creation of secure simulation models
US7454323B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 22, 2003 |
| Grant date | Nov 18, 2008 |
| Priority date | — |
| Expiry date | Mar 24, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for security systems are provided to protect electronic designs from unauthorized usage. An obfuscation system is provided for creating secure simulation models of IP cores that allow efficient evaluation of an electronic design incorporating an IP core but do not allow practical implementation of the IP core. The obfuscation system identifies regions for obfuscation within an IP core. Logic obfuscation is inserted into these regions. Examples of obfuscation include additional circuitry that produces time dilatation, space dilatation, or a combination of the two in the circuitry of an IP core. Typically, the inserted obfuscation does not change the ultimate behavior of the internal signals, but is complicated enough to make an electronic design so slow and/or so large that it cannot be implemented practically. Further, the inserted obfuscation should be of a type is not normally removed by that normal logic optimizations such as synthesis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.