Circuit and method for monitoring the status of a clock signal
US7454645B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2005 |
| Grant date | Nov 18, 2008 |
| Priority date | — |
| Expiry date | Jan 15, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit and method are provided herein for monitoring the status of a clock signal. In general, the method may include supplying a pair of clock signals to a clock monitor circuit, which is configured for monitoring a status of one clock signal relative to the other. The status indicates whether the frequency of the one clock signal is faster, slower or substantially equal to the frequency of the other clock signal. Once determined, the status may be stored as a bit pattern within a status register, which is operatively coupled to the clock monitor circuit. This enables the status to be read by detecting a logic state of one or more bits within the status register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.