Hosting structure of nanometric elements and corresponding manufacturing method
US7456508B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2005 |
| Grant date | Nov 25, 2008 |
| Priority date | — |
| Expiry date | Jan 16, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/723
Abstract
A hosting structure of nanometric components is described comprising a substrate, a first multi-spacer level comprising a first plurality of spacers including first conductive spacers parallel to each other, and at least a second multi-spacer level realized above said first multi-spacer level and comprising a second plurality of spacers arranged transversally to said first plurality of spacers and including at least a lower discontinuous insulating layer and an upper layer, including in turn second conductive spacers. In particular, each pair of spacers of the second multi-spacer level defines with a spacer of the first multi-spacer level a plurality of nanometric hosting seats having at least a first and a second conduction terminal realized by portions of the first conductive spacers and of the second conductive spacers faced in the hosting seats. A method for manufacturing such a structure is also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.