Memory device and method of operating the same
US7457181B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2006 |
| Grant date | Nov 25, 2008 |
| Priority date | — |
| Expiry date | Dec 7, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device has a global input/output line pair configured for data transfer. The memory device includes a sense amplifier, a detecting unit and a detect control signal generating unit. The sense amplifier is coupled to the global input/output line pair. The detecting unit detects a potential difference between the global input/output line pair. The detect control signal generating unit disables an operation of the sense amplifier and precharges the global input/output line pair to a predetermined voltage. A precharge operation of a memory device may be performed at a higher speed so that a high speed operation of the memory device may be achieved. In addition, the operating time of the sense amplifier may be decreased so that the power consumption of the memory device may be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.