Controlling operation of flash memories
US7457909B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Jan 14, 2005 |
| Grant date | Nov 25, 2008 |
| Priority date | — |
| Expiry date | Jan 7, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0246
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method controls write/erase operations in a memory device, such as a NAND flash memory. The method includes dividing the memory device in physical blocks, wherein each physical block is comprised of a number of pages; considering the memory device as comprising consecutive virtual blocks, each virtual block including consecutive sectors; associating to each virtual block a virtual block number; selecting the size of the virtual blocks equal to a multiple of the size of the physical blocks; and creating a virtual-to-physical mapping table having entries. Each entry in the mapping table stores a pointer to a root node of a tree structure that links logically a set of physical blocks in the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.