Digital two-stage automatic gain control
US7460623B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2003 |
| Grant date | Dec 2, 2008 |
| Priority date | — |
| Expiry date | Jun 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G2201/302
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital automatic gain control circuit is disclosed. The circuit includes a selector, a scaler, a detector, a gain adjustor and a controller. In one exemplary aspect, the selector receives an input signal having two components, namely, the in-phase (I) and quadrature (Q) components, in digital form. The selector then selects a subset of bits from each component based on a control signal provided by the controller. The two subsets are then forwarded to the scaler. The scaler then multiplies the two subsets respectively against a gain value to generate two multiplication results. A portion of each multiplication result is then provided as output by the scaler. The gain value and the subset selection are periodically adjusted in response to the scaler output. The adjustments with respect to the gain value and the subset selection are effectuated collectively by the detector, the gain adjustor and the controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.