Nanotube transistor integrated circuit layout
US7462890B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2006 |
| Grant date | Dec 9, 2008 |
| Priority date | — |
| Expiry date | Aug 24, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/936
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
An integrated circuit layout of a carbon nanotube transistor device includes a first and second conductive material. The first conductive material is connected to ends of single-walled carbon nanotubes below (or above) the first conductive material. The second conductive material is not electrically connected to the nanotubes below (or above) the second conductive material. The first conductive material may be metal, and the second conductive material may be polysilicon or metal. The nanotubes are perpendicular to the first conductive material. In one implementation, the first and second conductive materials form interdigitated fingers. In another implementation, the first conductive material forms a serpentine track.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.