Image display on an array screen
US7463252B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2003 |
| Grant date | Dec 9, 2008 |
| Priority date | — |
| Expiry date | Mar 6, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/046
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit for displaying an image by activation of pixels of an array screen based on an image stored in digital form in memory point rows of a frame memory, having a stand-by mode that provides, at a frequency proportional to the display frequency, a cyclic succession of offset values; and for each row address of the frame memory, activating pixels of a screen line associated with said address offset by a same offset value based on the read states of the row associated with the address, and/or activating pixels of a screen line associated with the row address based on the read states of the frame memory row associated with the address offset by a same offset value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.