Design structure for content addressable memory
US7464217B2 · kind B2 · utility
1Cited by
8References
8Claims
0Family size
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Key dates
| Filing date | Sep 6, 2007 |
| Grant date | Dec 9, 2008 |
| Priority date | — |
| Expiry date | Sep 6, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A design structure for content addressable memory including a first array of memory cells, and a second array of memory cells. A search logic circuit is configured to prevent a discharge of the second array of memory cells when a search of the first array of memory cells finds certain data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.