Method for reducing dislocation threading using a suppression implant
US7466009B2 · kind B2 · utility
1Cited by
8References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2006 |
| Grant date | Dec 16, 2008 |
| Priority date | — |
| Expiry date | Apr 20, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D8/25
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for manufacturing a semiconductor device. In one embodiment, the method for manufacturing the semiconductor device includes a method for manufacturing a zener diode, including among others, forming a doped well within a substrate and forming a suppression implant within the substrate. The method for manufacturing the zener diode may further include forming a cathode and an anode within the substrate, wherein the suppression implant is located proximate the doped well and configured to reduce threading dislocations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.