Probe card and testing method of semiconductor chip, capacitor and manufacturing method thereof
US7466152B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2006 |
| Grant date | Dec 16, 2008 |
| Priority date | — |
| Expiry date | Jul 14, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A probe card including probes, a build-up interconnection layer having a multilayer interconnection structure therein and carrying the probes on a top surface in electrical connection with the multilayer interconnection structure, and a capacitor provided on the build-up interconnection layer in electrical connection with one of the probes via the multilayer interconnection structure, wherein the multilayer interconnection structure includes an inner via-contact in the vicinity of the probe and the capacitor is embedded in a resin insulation layer constituting the build-up layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.