Saturation and rounding in multiply-accumulate blocks
US7467176B2 · kind B2 · utility
3Cited by
3References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2004 |
| Grant date | Dec 16, 2008 |
| Priority date | — |
| Expiry date | Nov 22, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/5443
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Saturation and rounding capabilities are implemented in multiply-accumulate (MAC) blocks to provide rounded and saturated outputs of multipliers and of add-subtract-accumulate circuits implemented using DSP. These features support any suitable format of value representation, including the x.15 format. Circuitry within the multipliers and the add-subtract-accumulate circuits implement the rounding and saturation features of the present invention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.