Method and structure for producing high performance linear algebra routines using register block data format routines
US7469266B2 · kind B2 · utility
20Cited by
19References
13Claims
0Family size
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Key dates
| Filing date | Sep 29, 2003 |
| Grant date | Dec 23, 2008 |
| Priority date | — |
| Expiry date | Jun 16, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method (and structure) of executing a matrix operation, includes, for a matrix A, separating the matrix A into blocks, each block having a size p-by-q. The blocks of size p-by-q are then stored in a cache or memory in at least one of the two following ways. The elements in at least one of the blocks is stored in a format in which elements of the block occupy a location different from an original location in the block, and/or the blocks of size p-by-q are stored in a format in which at least one block occupies a position different relative to its original position in the matrix A.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.