Method for resource balancing using dispatch flush in a simultaneous multithread processor
US7469407B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2003 |
| Grant date | Dec 23, 2008 |
| Priority date | — |
| Expiry date | Dec 9, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3851
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The processing of instructions from multiple threads using a shared dispatch pipeline is controlled by invoking a dispatch flush operation wherein instructions of a selected thread in the shared dispatch pipeline are flushed in response to resource requirements. A first thread in an SMT may be using more processing than corresponds to its priority because its instructions are dominating use of a shared resource. In this case, to rebalance instruction dispatch between the first thread and the second thread, a dispatch flush of instructions of the first thread is issued. Normally the flushed instructions of a thread are refetched and reenter the dispatch pipeline. If the first thread is dominating use of shared resources, hold may be issued following the dispatch flush holding instructions of the first thread until a balanced utilization is realized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.