Integrated circuit and fabrication process
US7470585B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2006 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Sep 21, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/011
Abstract
An integrated circuit has at least one semiconductor device for storing charge that includes at least one elementary active component and at least one elementary storage capacitor. The device includes a substrate having a lower region containing at least one buried capacitive elementary trench forming the elementary storage capacitor, and an elementary well located above the lower region of the substrate and isolated laterally by a lateral electrical isolation region. The elementary active component is located in the elementary well or in and on the elementary well. The capacitive elementary trench is located under the elementary active component and is in electrical contact with the elementary well. In one preferred embodiment, the lateral electrical isolation region is formed by a trench filled with a dielectric material and has a greater depth than that of the elementary well. Also provided is a method for fabricating an integrated circuit that includes a semiconductor device for storing charge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.