Transistors including laterally extended active regions and methods of fabricating the same
US7470588B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2006 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Apr 17, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A transistor includes a substrate and an isolation region disposed in the substrate. The isolation regions defines an active region comprising upper and lower active regions, the upper active region having a first width and the lower active region having a second width greater than the first width. An insulated gate electrode extends through the upper active region and into the lower active region. Source and drain regions are disposed in the active region on respective first and second sides of the insulated gate electrode. The insulated gate electrode may include an upper gate electrode disposed in the upper active region and a lower gate electrode disposed in the lower active region, wherein the lower gate electrode is wider than the upper gate electrode. Related fabrication methods are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.