Current mode interface for off-chip high speed communication
US7471110B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2006 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Mar 23, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0278
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A transceiver interface for data transfer between two integrated circuits (ICs or “chips”) utilizes a current mode technique rather than conventional voltage mode differential signaling techniques. A current pulse is injected into one of two transmission wires based on a signal value to be transmitted (e.g., logic “0” or “1”) by a driver on a transmitting chip. The current pulse is received as a differential current signal at a receive block in a receiving chip. The differential signal is converted to a low swing differential voltage signal by current comparators. The differential voltage signal may be detected by an op-amp receiver which outputs the appropriate signal value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.