Plasma display panel and driving method thereof
US7471265B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2005 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Jun 4, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/025
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A plasma display panel is provided having a plurality of scan electrodes and sustain electrodes formed parallel to each other in pairs on a first substrate, and a plurality of address electrodes formed on a second substrate that cross the plurality of first and second electrode pairs. A reset waveform is applied to a scan electrode during a reset period, and a scan pulse that falls from a first voltage level to a second voltage level is applied to the can electrode during an address period. A pre-scan pulse of a third voltage level, which is higher than the first voltage level, is applied to a scan electrode between the reset and address periods, and either a magnitude of the third voltage level or a width of the pre-scan pulse is adjusted according to patterns of subfield data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.