Bit segment timing organization providing flexible bit segment lengths
US7471273B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2005 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Nov 22, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/346
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are reset techniques for a spatial light modulator, and related system for displaying an image. The systems and methods have pixels that are loaded with data and reset commands to take on binary states, where the methods employ adaptable algorithms to provide flexibility in placement of the reset commands. Specifically, valid regions for such reset commands are determined, and times for consecutive bit segments are calculated; and DMD load times are adjusted for a proper sequence. An advantage of the disclosed methods is that two consecutive bit segments are no longer restricted to following a pattern of normal/short bit segments. In contrast, with the disclosed technique short segments may be consecutive, allowing the implementation of additional enhancements, including neutral density filtering (NDF) techniques that typically include adjacent short bits in the bit sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.