Phase detector and method for a shortening phase-error-correction pulse
US7471756B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 21, 2003 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Jun 9, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D13/004
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a phase-locked loop (PLL), a phase detector receives a reference signal and a feedback oscillator signal, generates a phase-detect pulse having a first duration in response to one of the reference and feedback signals, and generates a phase-correction pulse having second, shorter duration in response to the phase-detect pulse. By shortening the phase-correction pulse, such a phase detector can reduce or eliminate the overcorrection period during which the phase-correction pulse is active after phase correction is achieved, and thus can reduce or eliminate the phase error that the overcorrection period may introduce into a PLL's oscillator signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.