Method for addressing a symbol in a memory and device for processing symbols
US7472255B2 · kind B2 · utility
0Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2006 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Sep 28, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bitwise addressing mode includes including the shaping of symbols of variable length during an operation for reading or writing a symbol in a bank of memories. The addressing is then done with the aid of a word address and of a bit pointer designating the start of the symbol in the word corresponding to the word address. A shift operation is performed during an operation of reading or of writing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.