Automatic testing of microprocessor bus integrity
US7472328B1 · kind B1 · utility
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17References
20Claims
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Key dates
| Filing date | May 19, 2006 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | May 19, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/27
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Integrated circuit bus integrity may be verified without specialized test equipment. In a diagnostic mode, the integrated circuit may output a series of predetermined activation patterns onto the data bus to verify integrity of the data bus. Further bus verification may be provided by an address capture mode where address bus contents are reflected onto the data bus. A microprocessor may control diagnostic mode operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.