System and method to facilitate time domain sampling for solid state imager
US7474345B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2002 |
| Grant date | Jan 6, 2009 |
| Priority date | — |
| Expiry date | Aug 24, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/772
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A time domain sampling technique for a CMOS imager enables a wide dynamic range and flexibility by employing up to two-degrees of freedom during such sampling. Two degrees of freedom can be achieved by making one or both of an integration time and a reference (e.g., voltage or current) variable during sampling. The sampling (or image capture) is implemented by associating a time with when a pixel has a desired value relative to the reference in response to the pixel receiving incident light. The reference can be fixed or variable during different portions of the sampling, and further can be programmable to implement a desired sampling pattern for a given application.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.