Non-volatile memory with programming through band-to-band tunneling and impact ionization gate current
US7474568B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 16, 2006 |
| Grant date | Jan 6, 2009 |
| Priority date | — |
| Expiry date | Nov 16, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Electronic circuitry is described having a first transistor having a first gate dielectric located between an electrically floating gate and a semiconductor substrate. The first injection current flows through the first gate dielectric to establish a first amount of electrical charge on the gate electrode. The electronic circuitry also includes a second transistor having a second gate dielectric located between the gate electrode and the semiconductor substrate. A band-to-band tunneling current flows between valence and conduction bands of the second transistor to create a second injection current that flows through the second gate dielectric to establish the first amount of electrical charge on the gate electrode. Non volatile memory cell circuits having the above described circuitry are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.