Systems and methods for parallel signal cancellation
US7474690B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2004 |
| Grant date | Jan 6, 2009 |
| Priority date | — |
| Expiry date | Oct 12, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J13/0022
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The present invention provides systems and methods for parallel interference suppression. A processing engine is used to substantially cancel a plurality of signal paths and selected channel(s) of these signal paths interfering with a selected signal. The processing engine includes a plurality of matrix generators that are used to generate matrices with each matrix comprising elements of one or more of the interfering signal paths and channels selected for cancellation. The processing engine also includes one or more processors for processing the matrices to generate cancellation operators. A plurality of applicators applies the cancellation operators to parallel input signals to substantially cancel the interfering signal from each input signal. These input signals may include received signals and/or reference codes. The embodiments disclosed herein may be particularly advantageous to systems employing CDMA (e.g., such as cdmaOne and cdma2000), Wideband CDMA, Broadband CDMA, UMTS and Global Positioning System (“GPS”) signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.