Patent · US Expired

Phase adjusting circuit for minimized irregularities at phase steps

US7477714B2 · kind B2 · utility

2Cited by

3References

6Claims

0Family size

Assignee

TEXAS INSTRUMENTS DEUTSCHLAND GMBH · DE

Inventors

Markus Dietl · Munich, DE
Sotirios Tambouris · Munich, DE

Key dates

Filing date	Feb 14, 2005
Grant date	Jan 13, 2009
Priority date	—
Expiry date	Apr 30, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/0998
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An integrated phase adjusting circuit (12) for the generation of a clock output signal (CLKout) with a phase intermediate the phases of first and second input signals of equal frequency with a fixed phase shift between said first and second signals is proposed. The circuit has an interpolator unit (30) which determines the phase of the clock signal relative to either one of the first input signal and the second input signal, and is controlled externally by a control signal (PHfine) to execute a phase step if the phase of the clock signal is to be shifted. The circuit (12) comprises a synchronization unit (40) which synchronizes the phase step with the clock output signal generated by the circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.