Method of modeling and producing an integrated circuit including at least one transistor and corresponding integrated circuit
US7480604B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 9, 2003 |
| Grant date | Jan 20, 2009 |
| Priority date | — |
| Expiry date | May 16, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system is provided for modeling an integrated circuit including at least one insulated-gate field-effect transistor. The system includes generator means for defining a parameter representing mechanical stresses applied to the active area of the transistor, and processing means for determining at least one of the electrical parameters of the transistor based at least partially on the stress parameter. Also provided is a method of modeling an integrated circuit including at least one insulated-gate field-effect transistor, and a method of producing an integrated circuit including at least one insulated-gate field-effect transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.